Bücher von Nuno Paulino

This book provides a step-by-step methodology and system design that can be used to design a fully integrated PMU using SC DC-DC converters, for any CMOS technology. The authors discuss trade-offs between power density and efficiency of the methodology for the 130 nm CMOS technology, and how to implement it on other CMOS technologies. The book describes the state-of-the-art of fully or near-fully integrated SC DC-DC converters with multiple conversion ratios and the techniques used to enhance the overall performance of these converters. Coverage includes the trade-off between the number of conversion ratios and overall extracted efficiency from a supercapacitor, as well as the sizing of the converter cells according to the desired output power and maximum clock frequency. The authors also describe in detail the design of the fundamental blocks for the converter operation, which includes a secondary control loop using capacitance modulation by sensing the clock frequency.

This book discusses the design of switched-capacitor filters in deep-submicron CMOS technologies. The authors describe several topologies for switched-capacitor filter circuits that do not require high-gain high-bandwidth amplifiers. Readers will also learn two analysis methodologies that can be implemented efficiently in software and integrated into optimization environments for the automation of design for switched-capacitor filters. Although the optimization examples discussed utilize low gain amplifiers, the demonstrated methodologies can also be used for conventional, high-gain high-bandwidth amplifiers.

This book focuses on the design of a 3rd Order CT- M where the integrator stages of the filter are implemented with Bipolar-Junction Transistors (BJT) differential pairs. These circuits are fully analyzed and the design method is carefully explained. The design method is validated through experimental measurements of several prototype circuits.

This book describes the design of switched-capacitor filter circuits using low gain amplifiers and demonstrates some techniques that can minimize the effects of parasitic capacitances during the design phase.