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Bücher von Prabhjot Kaur

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  • von Prabhjot Kaur
    43,90 €

  • von Prabhjot Kaur
    34,00 €

    Data generated by educational settings can be used to predict the future of students. The data represented by various features was taken from University of California Irvine repository. Preprocessing and transformation of data was performed before training. For transformation, nominal data is converted to numerical form. Data mining algorithm from decision tree, neural network, support vector machine and regression were selected. Algorithms used were Simple Logistic Regression, Linear Regression, Sequential Minimal Optimization, Random Forest and Multilayer Perceptron. Algorithms were evaluated with 10-fold cross validation and standardized before training. Best algorithms were selected with highest accuracy and lowest root mean square error. The different methods are proposed to improve the performance of selected best algorithms. Accuracy of the best classifier was improved by using feature selection. Root mean square error of best algorithm was reduced by resampling. Using ensemble method, accuracy was increased and root mean square error was reduced to lowest possible value. Present and existing work is compared and it shows that higher accuracy and lowest error is achieved.

  • von Navneet Kaur, Prabhjot Kaur & Sandeep Singh Gill
    34,00 €

    The scaling of traditional planar CMOS devices is becoming difficult due to increasing gate leakage and subthreshold leakage. Multigate FETs have been proposed to overcome the limitations associated with the scaling of traditional CMOS devices below 100nm region. The multiple electrically coupled gates and the thin silicon body suppress the short-channel effects, thereby lowering the subthreshold leakage current in a multi-gate MOSFET. However, fabrication complexity increases for inversion mode (IM) FinFET devices due to ultra-steep doping profiles requirement. Junctionless transistor (JLT) overcomes the limitations associated with the creation of ultra-steep doping profiles during fabrication and short channel effects. In order to further reduce the SCEs, spacers at the both sides of gate are used that minimizes the leakage current. In this proposed work, JLT is designed with the use of spacer engineering i.e. changing the Lext, spacer¿s proportion as well as the dielectric values (¿) of spacer material and its performance are evaluated from device characteristics using TCAD software tool.

  • - Pathobiology, B Cell Receptors, Novel Mutations, Clonal Evolution
    von Prabhjot Kaur
    83,00 €

    This text provides a comprehensive, state-of-the art review of this field, and will serve as a valuable resource for pathologists and clinical hematologists/oncologists with an interest in chronic lymphocytic leukemia.

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