Bücher der Reihe Analog Circuits and Signal Processing

This book describes techniques for time-interleaving a number of analog-to-digital data converters to achieve demanding bandwidth requirements. Also presented is a real-world low-power solution that alleviates time-varying signal artifacts.

Focusing on complex delta-sigma ADCs, this book describes techniques to alleviate problems in implementation, such as image rejection deterioration due to mismatches. It also covers the advantages of filtering STFs and sets out an implementation architecture.

This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF) and digital signal processing circuits (DSP). It addresses issues from circuit and system design to production design.

This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. It examines the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s.

This book tackles both high efficiency and high linearity power amplifier (PA) design in low-voltage CMOS. With its emphasis on theory, design and implementation, the book offers a guide for those actively involved in the design of fully integrated CMOS wireless transceivers.

Coverage includes a comprehensive survey of commercially available, off-the-shelf integrated circuit CFOAs, as well as recent advances made on the design of CFOAs, including design innovations for bipolar and CMOS CFOAs.

This book covers modeling, simulation and analysis of analog circuit aging, nanometer CMOS physical effects resulting in unreliability, transistor aging compact models for circuit simulation, methods for efficient circuit reliability simulation and more.

This book presents concepts and architectures for power use, wireless links, and circuit design for Wireless Body Area Networks, which will allow new applications for the ambulatory health monitoring of chronic disease patients and the elderly population.

This book covers architecture and circuit design for cognitive radio receiver front-ends, offering a holistic explanation of RF circuits for cognitive radio systems and in-depth exploration of existing and novel circuit design techniques and architectures.

This book provides analysis and discusses the design of various MOSFET technologies. Coverage includes comparison of Single-gate MOSFET and Double-gate MOSFET switching parameters as well as testing of MOSFETs parameters using image acquisition.

This book describes the various tradeoffs systems designers face when designing embedded memory. It uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.

This book offers a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), covering time-to-digital converters, noise shaping and more. Includes advice on analysis and simulation techniques, and reusable Matlab code.

Readers will be enabled to implement ADCs as continuous-time delta-sigma (CT ) modulators, offering simple resistive inputs, which do not require the use of power-hungry input buffers, as well as offering inherent anti-aliasing, which simplifies system integration.

This book describes the design of fully digital multistandard transmitter front-ends which can directly drive one or more switching power amplifiers, eliminating all other analog components. Describes two chips designed using nanometer CMOS technologies.

The 802.11n wireless standard uses 64-state quadrature amplitude modulation (64-QAM) to achieve higher spectral efficiency. Consequently, the transmitter and receiver require a higher signal to noise ratio with the same level of error rate performance.

Providing detailed design techniques that enable readers to create more efficient switch-capacitor on-chip generators, this guide features comprehensive exemplar circuits and covers all the component circuit blocks including level-shifters and oscillators.

This book focuses on increasing the energy-efficiency of electronic devices so that portable applications can have a longer stand-alone time on the same battery. The authors explain the energy-efficiency benefits that ultra-low-voltage circuits provide and provide answers to tackle the challenges which ultra-low-voltage operation poses.

This book explores the design of ultra-low power radios and shows how they can form networks to facilitate a applications in healthcare and environmental monitoring, since they can operate for years off a small battery or harvest energy from the environment.

With a billion - soon to be two billion - cellular telephones in circulation, the next challenge is to make cellular radio functions adaptive to their environment. This book provides a comprehensive theoretical framework for optimizing performance, discussing joint optimization of Noise Figure and Input Intercept Point in receiver systems.

The authors show the recent development of millimeter-wave design techniques, especially of power amplifiers and transmitters, and presents novel design concepts, such as "power transistor layout" and "4-way parallel-series power combiner", that can enhance the output power and efficiency of power amplifiers in a compact silicon area.

This book describes the life cycle process of IP cores, from specification to production, including IP modeling, verification, optimization, and protection.

This new edition includes a variety of useful updates, including coverage of power efficiency and comprehensive optimization methodologies for DC-DC voltage multipliers, modeling of extremely low voltage Dickson charge pumps, and modeling and optimum design of AC-DC switched-capacitor multipliers for energy harvesting and power transfer for RFID.

AC-DC conversion from the mains to a low voltage DC is discussed, enabling an efficient and compact, lower-power auxiliary power supply to take over the power delivery during the standby mode of mains-connected appliances, allowing the main power converter of these devices to be shut down fully.

This book introduces readers to the potential of charge-sharing (CS) successive approximation register (SAR) analog-to-digital converters (ADCs), while providing extensive analysis of the factors that limit the performance of the CS topology.

This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF) and digital signal processing circuits (DSP). It addresses issues from circuit and system design to production design.

This book presents techniques necessary to predict cardiac arrhythmias, long before they occur, based on minimal ECG data. The authors describe the key information needed for automated ECG signal processing, including ECG signal pre-processing, feature extraction and classification.

This book discusses design techniques, layout details and measurements of several key analog building blocks that currently limit the performance of 5G and E-Band transceivers implemented in deep-scaled CMOS.

This book describes the PREMISS system, which enables readers to overcome the limitations of state-of-the-art battery-less wireless sensors in size, cost, robustness and range, with a system concept for a 60 GHz wireless sensor system with monolithic sensors.

This book introduces a new approach to model and predict substrate parasitic failures in integrated circuits with standard circuit design tools.The injection of majority and minority carriers in the substrate is a recurring problem in smart power ICs containing high voltage, high current switching devices besides sensitive control, protection and signal processing circuits.The injection of parasitic charges leads to the activation of substrate bipolar transistors. This book explores how these events can be evaluated for a wide range of circuit topologies. To this purpose, new generalized devices implemented in Verilog-A are used to model the substrate with standard circuit simulators. This approach was able to predict for the first time the activation of a latch-up in real circuits through post-layout SPICE simulation analysis.Discusses substrate modeling and circuit-level simulation of parasitic bipolar device coupling effects in integrated circuits;Includes circuit back-annotation of the parasitic lateral n-p-n and vertical p-n-p bipolar transistors in the substrate;Uses Spice for simulation and characterization of parasitic bipolar transistors, latch-up of the parasitic p-n-p-n structure, and electrostatic discharge (ESD) protection devices;Offers design guidelines to reduce couplings by adding specific protections.