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Piecewise Linear (PL) approximation of non-linear behaviour is a well-known technique in synthesis and analysis of electrical networks. However, the PL description should be efficient in data storage and the description should allow simple retrieval of the stored information. Furthermore, it would be useful if the model description could handle a large class of piecewise linear mappings. Piecewise Linear Modeling and Analysis explains in detail all possible model descriptions for efficiently storing piecewise linear functions, starting with the Chua descriptions. Detailed explanation on how the model parameter can be obtained for a given mapping is provided and demonstrated by examples. The models are ranked to compare them and to show which model can handle the largest class of PL mappings. All model descriptions are implicitly related to the Linear Complementarity Problem and most solution techniques for this problem, like Katzenelson and Lemke, are discussed according to examples that are explained in detail. To analyse PL electrical networks a simulator is mandatory. Piecewise Linear Modeling and Analysis provides a detailed outline of a possible PL simulator, including pseudo-programming code. Several simulation domains like transient, AC and distortion are discussed. The book explains the attractive features of PL simulators with respect to mixed-level and mixed-signal simulation while paying due regard also to hierarchical simulation. Piecewise Linear Modeling and Analysis shows in detail how many existing components in electrical networks can be modeled. These range from digital logic and analog basic elements such as transistors to complex systems like Phase-Locked Loops and detection systems. Simulation results are also provided. The book concludes with a discussion on how to find multiple solutions for PL functions or networks. Again, the most common techniques are outlined using clear examples. Piecewise Linear Modeling and Analysis is an indispensable guide for researchers and designers interested in network theory, network synthesis and network analysis.

Knowledge Base Systems are an integration of conventional database systems with Artificial Intelligence techniques. They provide inference capabilities to the database system by encapsulating the knowledge of the application domain within the database. Knowledge is the most valuable of all corporate resources that must be captured, stored, re-used and continuously improved, in much the same way as database systems were important in the previous decade. Flexible, extensible, and yet efficient Knowledge Base Systems are needed to capture the increasing demand for knowledge-based applications which will become a significant market in the next decade. Knowledge can be expressed in many static and dynamic forms; the most prominent being domain objects, their relationships, and their rules of evolution and transformation. It is important to express and seamlessly use all types of knowledge in a single Knowledge Base System. Parallel, Object-Oriented, and Active Knowledge Base Systems presents in detail features that a Knowledge Base System should have in order to fulfill the above requirements. Parallel, Object-Oriented, and Active Knowledge Base Systems covers in detail the following topics: Integration of deductive, production, and active rules in sequential database systems. Integration and inter-operation of multiple rule types into the same Knowledge Base System. Parallel rule matching and execution, for deductive, production, and active rules, in parallel Export, Knowledge Base, and Database Systems. In-depth description of a Parallel, Object-Oriented, and Active Knowledge Base System that integrates all rule paradigms into a single database system without hindering performance. Parallel, Object-Oriented, and Active Knowledge Base Systems is intended as a graduate-level text for a course on Knowledge Base Systems and as a reference for researchers and practitioners in the areas of database systems, knowledge base systems and Artificial Intelligence.

Conceptual Design of Multichip Modules and Systems treats activities which take place at the conceptual and specification level of the design of complex multichip systems. These activities include the formalization of design knowledge (information modeling), tradeoff analysis, partitioning, and decision process capture. All of these functions occur prior to the traditional CAD activities of synthesis and physical design. Inherent in the design of electronic modules are tradeoffs which must be understood before feasible technology, material, process, and partitioning choices can be selected. The lack of a complete set of technology information is an especially serious problem in the packaging and interconnect field since the number of technologies, process, and materials is substantial and selecting optimums is arduous and non-trivial if one truly wants a balance in cost and performance. Numerous tradeoff and design decisions have to be made intelligently and quickly at the beginning of the design cycle before physical design work begins. These critical decisions, made within the first 10% of the total design cycle, ultimately define up to 80% of the final product cost. Conceptual Design of Multichip Modules and Systems lays the groundwork for concurrent estimation level analysis including size, routing, electrical performance, thermal performance, cost, reliability, manufacturability, and testing. It will be useful both as a reference for system designers and as a text for those wishing to gain a perspective on the nature of packaging and interconnect design, concurrent engineering, computer-aided design, and system synthesis.

The problem of "e;Shortest Connectivity"e;, which is discussed here, has a long and convoluted history. Many scientists from many fields as well as laymen have stepped on its stage. Usually, the problem is known as Steiner's Problem and it can be described more precisely in the following way: Given a finite set of points in a metric space, search for a network that connects these points with the shortest possible length. This shortest network must be a tree and is called a Steiner Minimal Tree (SMT). It may contain vertices different from the points which are to be connected. Such points are called Steiner points. Steiner's Problem seems disarmingly simple, but it is rich with possibilities and difficulties, even in the simplest case, the Euclidean plane. This is one of the reasons that an enormous volume of literature has been published, starting in 1 the seventeenth century and continuing until today. The difficulty is that we look for the shortest network overall. Minimum span- ning networks have been well-studied and solved eompletely in the case where only the given points must be connected. The novelty of Steiner's Problem is that new points, the Steiner points, may be introduced so that an intercon- necting network of all these points will be shorter. This also shows that it is impossible to solve the problem with combinatorial and geometric methods alone.

Standard voltages used in today's ICs may vary from about 1.3V to more than 100V, depending on the technology and the application. High voltage is therefore a relative notion. High Voltage Devices and Circuits in Standard CMOS Technologies is mainly focused on standard CMOS technologies, where high voltage (HV) is defined as any voltage higher than the nominal (low) voltage, i.e. 5V, 3.3V, or even lower. In this standard CMOS environment, IC designers are more and more frequently confronted with HV problems, particularly at the I/O level of the circuit. In the first group of applications, a large range of industrial or consumer circuits either require HV driving capabilities, or are supposed to work in a high-voltage environment. This includes ultrasonic drivers, flat panel displays, robotics, automotive, etc. On the other hand, in the emerging field of integrated microsystems, MEMS actuators mainly make use of electrostatic forces involving voltages in the typical range of 30 to 60V. Last but not least, with the advent of deep sub-micron and/or low-power technologies, the operating voltage tends towards levels ranging from 1V to 2.5V, while the interface needs to be compatible with higher voltages, such as 5V. For all these categories of applications, it is usually preferable to perform most of the signal processing at low voltage, while the resulting output rises to a higher voltage level. Solving this problem requires some special actions at three levels: technology, circuit design and layout. High Voltage Devices and Circuits in Standard CMOS Technologies addresses these topics in a clear and organized way. The theoretical background is supported by practical information and design examples. It is an invaluable reference for researchers and professionals in both the design and device communities.

Multimedia data streams will form a major part of the new generation of applications in high-speed networks. Continuous media streams, however, require transmission with guaranteed performance. In addition, many multimedia applications will require peer-to-multipeer communication. Guaranteed performance can only be provided with resource reservation in the network, and efficient multipeer communication must be based on multicast support in the lower layers of the network. Architecture and Protocols for High-Speed Networks focuses on techniques for building the networks that will meet the needs of these multimedia applications. In particular two areas of current research interest in such communication systems are covered in depth. These are the protocol related aspects, such as switched networks, ATM, MAC layer, network and transport layer; and the services and applications. Architecture and Protocols for High-Speed Networks contains contributions from leading world experts, giving the most up-to-date research available. It is an essential reference for all professionals, engineers and researchers working in the area of high-speed networks.

In science, engineering and economics, decision problems are frequently modelled by optimizing the value of a (primary) objective function under stated feasibility constraints. In many cases of practical relevance, the optimization problem structure does not warrant the global optimality of local solutions; hence, it is natural to search for the globally best solution(s). Global Optimization in Action provides a comprehensive discussion of adaptive partition strategies to solve global optimization problems under very general structural requirements. A unified approach to numerous known algorithms makes possible straightforward generalizations and extensions, leading to efficient computer-based implementations. A considerable part of the book is devoted to applications, including some generic problems from numerical analysis, and several case studies in environmental systems analysis and management. The book is essentially self-contained and is based on the author's research, in cooperation (on applications) with a number of colleagues. Audience: Professors, students, researchers and other professionals in the fields of operations research, management science, industrial and applied mathematics, computer science, engineering, economics and the environmental sciences.

As electronic technology reaches the point where complex systems can be integrated on a single chip, and higher degrees of performance can be achieved at lower costs, designers must devise new ways to undertake the laborious task of coping with the numerous, and non-trivial, problems that arise during the conception of such systems. On the other hand, shorter design cycles (so that electronic products can fit into shrinking market windows) put companies, and consequently designers, under pressure in a race to obtain reliable products in the minimum period of time. New methodologies, supported by automation and abstraction, have appeared which have been crucial in making it possible for system designers to take over the traditional electronic design process and embedded systems is one of the fields that these methodologies are mainly targeting. The inherent complexity of these systems, with hardware and software components that usually execute concurrently, and the very tight cost and performance constraints, make them specially suitable to introduce higher levels of abstraction and automation, so as to allow the designer to better tackle the many problems that appear during their design. Advanced Techniques for Embedded Systems Design and Test is a comprehensive book presenting recent developments in methodologies and tools for the specification, synthesis, verification, and test of embedded systems, characterized by the use of high-level languages as a road to productivity. Each specific part of the design process, from specification through to test, is looked at with a constant emphasis on behavioral methodologies. Advanced Techniques for Embedded Systems Design and Test is essential reading for all researchers in the design and test communities as well as system designers and CAD tools developers.

Analog Signal Processing brings together in one place important contributions and state-of-the-art research results in this rapidly advancing area. Analog Signal Processing serves as an excellent reference, providing insight into some of the most important issues in the field.

not a coincidence, but is the result of a carefully planned time of landing (sun elevation) and lander orientation (sun azimuth). * The picture was started 25 seconds after touchdown and took 15 seconds to acquire. The alternating bright and dark vertical striations at the left side of the image and the fine particles deposited on the footpad at the right side were caused by a turbulent cloud of dust raised by the lander's retrorockets. t *F. O. Huck and S. D. Wall, "e;Image quality prediction: An aid to the Viking Lander imaging investigation on Mars. "e; Appl. Opt. 15, 1748-1766 (1976). tT. A. Mutch, A. B. Binder, F. O. Huck, E. C. Levinthal, S. Liebes, Jr. , E. C. Morris, W. R. Patterson, J. B. Pollack, C. Sagan and G. R. Taylor, "e;The Surface of Mars: The view from the Viking 1 Lander. "e; Science 193, 791-801 (1976). VISUAL COMMUNICATION An Information Theory Approach Chapter 1 Introduction 1. 1 OBJECTIVE l The fundamental problem of communication, as Shannon stated it, is that of reproducing at one point either exactly or approximately a message selected at another point. In the classical model of communication (Fig. 1. 1), the infor- mation source selects a desired message from a set of possible messages which the transmitter changes into the signal that is actually sent over the commu- nication channel to the receiver. The receiver changes this signal back into a message, and hands this message to the destination.

Embedded core processors are becoming a vital part of today's system-on-a-chip in the growing areas of telecommunications, multimedia and consumer electronics. This is mainly in response to a need to track evolving standards with the flexibility of embedded software. Consequently, maintaining the high product performance and low product cost requires a careful design of the processor tuned to the application domain. With the increased presence of instruction-set processors, retargetable software compilation techniques are critical, not only for improving engineering productivity, but to allow designers to explore the architectural possibilities for the application domain. Retargetable Compilers for Embedded Core Processors, with a Foreword written by Ahmed Jerraya and Pierre Paulin, overviews the techniques of modern retargetable compilers and shows the application of practical techniques to embedded instruction-set processors. The methods are highlighted with examples from industry processors used in products for multimedia, telecommunications, and consumer electronics. An emphasis is given to the methodology and experience gained in applying two different retargetable compiler approaches in industrial settings. The book also discusses many pragmatic areas such as language support, source code abstraction levels, validation strategies, and source-level debugging. In addition, new compiler techniques are described which support address generation for DSP architecture trends. The contribution is an address calculation transformation based on an architectural model. Retargetable Compilers for Embedded Core Processors will be of interest to embedded system designers and programmers, the developers of electronic design automation (EDA) tools for embedded systems, and researchers in hardware/software co-design.

The number of people who live in Asia is greater than the total number of people who live in the rest of the world. More than 160 cities in Asia have a population of at least one million people. Thus, when new infectious diseases threaten popu- tions in Asia, huge segments of the global population are at risk. At the same time, Asians are thoroughly integrated with the rest of the world, providing skilled exp- tise and becoming trading partners in all continents. Infectious diseases ordinarily show no preference for infection or disease according to race or ethnic background. A few exceptions exist, due to the host- pathogen evolution that happened before the recent era of rapid travel. Such exc- tions occur usually because the infectious agent was newly introduced to one population only after having existed and evolved for hundreds or thousands of years in a different population. As air travel became popular in the last few generations of people, it became increasingly difficult for populations to remain in isolation. Thus, in 2003, SARS in China rapidly became SARS in Canada. Throughout history, a major source of new infections of people has been old infections of animals. For some, such as Ebola or Lassa, transmission to people is rare and self-limiting, though frighteningly lethal for the few unfortunate indivi- als who get infected. And Ebola and Lassa are indigenous for Africa, not Asia.

This is a revised and expanded edition of a successful graduate and reference text. The book is designed for a standard graduate course on probability theory, including some important applications. The new edition offers a detailed treatment of the core area of probability, and both structural and limit results are presented in detail. Compared to the first edition, the material and presentation are better highlighted; each chapter is improved and updated.

The information infrastructure--comprising computers, embedded devices, networks and software systems--is vital to operations in every sector. Global business and industry, governments, and society itself, cannot function effectively if major components of the critical information infrastructure are degraded, disabled or destroyed.This book contains a selection of 27 edited papers from the First Annual IFIP WG 11.10 International Conference on Critical Infrastructure Protection.