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System Level Design

Über System Level Design

The complexity of embedded systems is exploding into two interrelated but independently growing directions: architectures complexity/heterogeneity and applications complexity. On the other hand, time- to-market and design productivity factors are constantly shrinking. Consequently, the gap between system complexity and design productivity is constantly increasing. To reduce this gap, System Level Design (SLD) has shown a lot of potential. However, it still involves a substantial number of design challenges. For example, complex applications should be analyzed at higher abstraction level without any architecture directives to provide application-architecture mapping guidelines. Fast performance estimation techniques at cycle-accurate level are required to estimate the software performance on the target architecture. Similarly, the performance analysis of parallel execution on heterogeneous architectures without performing HW/SW co-simulation is an increasingly challenging problem. This book explores the holistic view of SLD to ensure an optimal and rapid design of embedded systems.

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  • Sprache:
  • Englisch
  • ISBN:
  • 9783844323276
  • Einband:
  • Taschenbuch
  • Seitenzahl:
  • 200
  • Veröffentlicht:
  • 25. März 2011
  • Abmessungen:
  • 152x229x12 mm.
  • Gewicht:
  • 299 g.
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Beschreibung von System Level Design

The complexity of embedded systems is exploding into two interrelated but independently growing directions: architectures complexity/heterogeneity and applications complexity. On the other hand, time- to-market and design productivity factors are constantly shrinking. Consequently, the gap between system complexity and design productivity is constantly increasing. To reduce this gap, System Level Design (SLD) has shown a lot of potential. However, it still involves a substantial number of design challenges. For example, complex applications should be analyzed at higher abstraction level without any architecture directives to provide application-architecture mapping guidelines. Fast performance estimation techniques at cycle-accurate level are required to estimate the software performance on the target architecture. Similarly, the performance analysis of parallel execution on heterogeneous architectures without performing HW/SW co-simulation is an increasingly challenging problem. This book explores the holistic view of SLD to ensure an optimal and rapid design of embedded systems.

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